Physical defects in semiconductor materials used to make integrated circuits (ICs) have been found to affect the performance of various devices, e.g., transistors, within the ICs. For example, dislocations in the crystal lattice of these materials play an important role in determining the electrical and mechanical properties of semiconductor materials. Experimental evidence shows that dislocations degrade the electronic properties of solid-state devices by forming intrinsic conductive paths or developing unwanted spare charges. Dislocation defects partition an otherwise monolithic crystal structure and introduce unwanted and abrupt changes in electrical and optical properties. A dislocation or a cluster of dislocations attract metallic and ionic impurities and can provide an unwanted electrically conductive path between different regions of the semiconductor device.
Generally, dislocations can develop during fabrication as a result of manufacturing processes, e.g. stress induced in a silicon substrate during the formation of shallow trench isolation (STI) structures and damage caused by implantation during formation of diffusion regions within the substrate. As examples of the former, dislocations can be caused by curvature in the bottom corners of the STI structures, intrinsic stress in the STI fill, and stress induced by oxidation after the STI trench is filled. As examples of the latter, dislocations can result from deep well implantation and end of range dislocations from extension of source/drain implantation.
As the level of integration continues to increase and, correspondingly, device feature sizes continue to decrease, dislocation defects are increasingly impacting yield. These defects can reduce device yield either by affecting the device's functionality or by increasing the current consumption under stand-by conditions. Therefore, minimizing the occurrence of dislocation defects is important in a wide variety of semiconductor devices and processes. However, oftentimes failures from dislocation defects are difficult to distinguish from other single cell failures.
Detection by conventional physical failure analysis is extremely tedious and limited. Accordingly, there is a clear need for an efficient and effective program for studying dislocation defects and their causes. It is therefore a feature of the present invention to provide an efficient architecture and circuit to cause, detect and study dislocation defects. It is a feature of the present invention to provide a method of detecting and studying dislocations and thus the data needed to make the process dislocation immune. It allows learning and monitoring of dislocation defects for yield improvement. It is a further feature of the present invention that such a method gives fast failure analysis and fast yield learning.